HUAWEI-CLK-MIB: View SNMP OID List / Download MIB

VENDOR: HUAWEI


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Object Name OID Type Access Info
 hwClock 1.3.6.1.4.1.2011.6.25
Clock Management MIB . Added the Nodes of hwUASystemWorkMode And hw3rdClkSubBoardWorkMode by fengjinchun
       hwClkMibObjects 1.3.6.1.4.1.2011.6.25.1
           hwClockInManageTable 1.3.6.1.4.1.2011.6.25.1.1 no-access
Clock Source Management Table (the max record number is 10)
               hwClockInManageEntry 1.3.6.1.4.1.2011.6.25.1.1.1 no-access
Clock Source Management Table Entity
                   hwClkInIndex 1.3.6.1.4.1.2011.6.25.1.1.1.1 integer no-access
Clock source index: from 0 to 9 is effective, 255 indicates local source
                   hwClkInPostion 1.3.6.1.4.1.2011.6.25.1.1.1.2 integer32 read-only
The ifIndex of physical position of clock source.If the clock source isn't a sysline clock, the value will be NULL_ULONG(0xFFFFFFFFFFFFFF).The highest byte is useless.The second byte describes the NO. of frame, the third byte describes the NO. of slot and the lowest byte describes the port ID. The following shows how to use parameter when getting or setting: 0x 0000, FFFF,0000,0000 Frame ID; 0~255 0x 0000, 0000,FFFF,0000 Slot ID; 0~255 0x 0000, 0000,0000,FFFF Port ID; 0~255
                   hwClkInWorkMode 1.3.6.1.4.1.2011.6.25.1.1.1.3 integer read-only
Clock source type: none(1), -- clock source not configuration sysLine(2), -- line clock source that need to specify frame/slot/port cesLine(3), -- line_clk of a ces clock source cesSrts(4), -- srts_clk of a ces clock source e1Bits0(5), -- e1 type of a bits0 clock source e1Bits1(6), -- e1 type of a bits1 clock source f2mhzBits0(7),-- 2MHZ type of a bits0 clock source f2mhzBits1(8),-- 2MHZ type of a bits1 clock source msuSdh(9), -- sdh_clk of a msu clock source msuTdm(10), -- tdm_clk of a msu clock source localSurge(11), -- local surge clock xpm-8k(12), --xpm-8k type of a xpm-8k clock source includes line clock source, bits clock source,local surge source, If it is line clock source of ces port, it may be ces line or ces srts clock source,. If it is bits clock source, it may be 2MHZ or e1 clock source of bits0, or 2MHZ or e1. clock source of bits1. if the value is 1, it indicates that clock source isn't configured Enumeration: 'none': 1, 'f2mhzBits0': 7, 'sysLine': 2, 'cesLine': 3, 'localSurge': 11, 'f2mhzBits1': 8, 'msuTdm': 10, 'e1Bits1': 6, 'e1Bits0': 5, 'xpm-8k': 12, 'cesSrts': 4, 'msuSdh': 9.
                   hwClkInOperStatus 1.3.6.1.4.1.2011.6.25.1.1.1.4 integer read-only
clock source state none(1), -- clock source index isn't configured normal(2), -- the state of clock source is active failure(3) -- the state of clock source fails. Enumeration: 'failure': 3, 'none': 1, 'normal': 2.
                   hwClkInRowStatus 1.3.6.1.4.1.2011.6.25.1.1.1.5 rowstatus read-only
Clock Source operationadd clock source and clear clock source by user. when a user adds clock source, clock works in trace mode and when a user clears clock source clock works in srystal mode. To set position(frame,slot,port) and oper(4), these two operation should be set together. oper(6) could be set by itself. To set a bit clock source, the frame,slot,port parameters are useless. Oper(6) is used to clear a clock source.
                   hwClkInBitsImpedance 1.3.6.1.4.1.2011.6.25.1.1.1.6 integer read-only
BITS clock impedance type: bits_impedance_75ohm(1), -- the impedance of this bits clock source is 75 ohm bits_impedance_120ohm(2), -- the impedance of this bits clock source is 120 ohm bits_impedance_none(255), -- this clock source is not a bits clock The impedance value must been set when the clock source is a bits clock Enumeration: 'bits_impedance_none': 255, 'bits_impedance_75ohm': 1, 'bits_impedance_120ohm': 2.
                   hwClkInBitsType 1.3.6.1.4.1.2011.6.25.1.1.1.7 integer read-only
BITS clock type: bits_2MHz(1), -- the bits type is 2MHz bits_2Mbps(2), -- the bits type is 2bps bits_type_none(255) -- the clock source is not a bits clock The impedance value must been set when the clock source is a bits clock Enumeration: 'bits_type_none': 255, 'bits_type_2MHz': 1, 'bits_type_2Mbps': 2.
           hwClockOutManageTable 1.3.6.1.4.1.2011.6.25.1.2 no-access
Clock Out Management Table (the max record number is 10)
               hwClockOutManageEntry 1.3.6.1.4.1.2011.6.25.1.2.1 no-access
Clock Out Management Table Entity
                   hwClkOutIndex 1.3.6.1.4.1.2011.6.25.1.2.1.1 integer no-access
index of clock out type, its meaning is the same as hwClkOutType. The clock out index must be 8k in UA system and must be sdh or tdm in MD/MA system during the setting of priority for a clock source.
                   hwClkOutType 1.3.6.1.4.1.2011.6.25.1.2.1.2 integer read-only
Clock Out Type, at present there are four types: sdh, tdm, 8k and 19m. Enumeration: 'clk19M': 4, 'clk8K': 3, 'sdh': 1, 'tdm': 2.
                   hwClkOutPriority 1.3.6.1.4.1.2011.6.25.1.2.1.3 integer read-write
Clock source priority, 0 is the highest priority and from 0 to 9 priority is descending If get value is 255, it indicates that the priority of the clock souce isn't configured.
                   hwClkOutWorkMode 1.3.6.1.4.1.2011.6.25.1.2.1.4 integer read-only
The Out work mode of clock: trace(1) indicates clock is working in tracing mode surge(2) indicates clock is working in surge mode keep(3) indicates clock is working in keeping mode snap(4) indicates clock is working in snapping mode Enumeration: 'snap': 4, 'surge': 2, 'thirdsurge': 5, 'trace': 1, 'keep': 3.
                   hwClkOutOperStatus 1.3.6.1.4.1.2011.6.25.1.2.1.5 truthvalue read-only
Clock source Out state. It indicates whether the clock source is the Out clock of system: 1--yes, 2--no
           hwSystemClockManagePara 1.3.6.1.4.1.2011.6.25.1.3
               hwUASystemWorkMode 1.3.6.1.4.1.2011.6.25.1.3.1 integer read-write
UA work mode: OLT(1),--UA works as OLT in VPRING ONU(2),--UA works as ONU in VPRING Enumeration: 'olt': 1, 'on': 2.
               hw3rdClkSubBoardWorkMode 1.3.6.1.4.1.2011.6.25.1.3.2 integer read-only
The Out work mode of 3rd subboard clock: trace(1) indicates clock is working in tracing mode keep(2) indicates clock is working in keeping mode 3rdsurge(3) indicates clock is working in 3rd subboard crystal snap(4) indicates clock is working in snap mode no3rdclksubboard(255) indicates does not have 3rd subboard Enumeration: 'snap': 4, 'no3rdclksubboard': 255, 'thirdsurge': 3, 'trace': 1, 'keep': 2.
               hwSystemClockMode 1.3.6.1.4.1.2011.6.25.1.3.3 integer read-only
The Clock mode: clock-clksubboard(1) clock-subboard supply output clock clock-localboard(2) local-board supplay output clock Enumeration: 'clock-clksubboard': 1, 'clock-localboard': 2.
               hw3rdClkSubBoardInputStatus 1.3.6.1.4.1.2011.6.25.1.3.4 integer read-only
The Clock mode: none(1) clock-subboard have no clock-signal input normal(2) clock-subboard clock-signal input normal fault(3) clock-subboard clock-signal input fault no3rdclksubboard(255) indicates does not have 3rd subboard Enumeration: 'no3rdclksubboard': 255, 'fault': 3, 'none': 1, 'normal': 2.
               hw3rdClkSubBoardOutputStatus 1.3.6.1.4.1.2011.6.25.1.3.5 integer read-only
The Clock mode: normal(1) clock-subboard output status normal fault(2) clock-subboard output status fault no3rdclksubboard(255) indicates does not have 3rd subboard Enumeration: 'no3rdclksubboard': 255, 'fault': 2, 'normal': 1.
           hwClockOutPortManageTable 1.3.6.1.4.1.2011.6.25.1.4 no-access
Clock Out Port Management Table(the max record number is 24)
               hwClockOutPortManageEntry 1.3.6.1.4.1.2011.6.25.1.4.1 no-access
Clock Out Port Management Table Entity
                   hwClkOutputPostion 1.3.6.1.4.1.2011.6.25.1.4.1.1 integer32 read-only
The ifIndex of physical position of clock source.The highest byte is useless.The second byte describes the NO. of frame, the third byte describes the NO. of slot and the lowest byte describes the NO. of port. How to use parameter when getting or setting is as below: 0x 0000, FFFF,0000,0000 Frame ID; 0~255 0x 0000, 0000,FFFF,0000 Slot ID; 0~255 0x 0000, 0000,0000,FFFF Port ID; 0~255
                   hwClkOutPortEnable 1.3.6.1.4.1.2011.6.25.1.4.1.2 integer read-only
Clock source type: enable(0), -- Enabled this bits-port clock source output -- that need to specify frame/slot/port disable(1), -- Disabled this bits-port clock source output -- that need to specify frame/slot/port Enumeration: 'enable': 0, 'disable': 1.